Having got the hardware finished it was time to convince the Pluto that it had a 50MHz NOT 40 MHz reference. This was easier said than done!
It took 6 hours of internet research and trials before a working solution was finally found at https://tbspace.de/plutosdrclockinput.html AND which would survive a pluto power down.
The final solution was to execute the following on the pluto. No idea why it works or what it does, but it solved my problem
fw_setenvadi_loadvals fdt addr fit_load_address } && fdt get value fdt_choosen
/ fit_config }/ fdt && fdt get addr fdtaddr / fdt_choosen } data && fdt addr
fdtaddr }; if test ! n ${ad936x_skip_ext_refclk}; then if test n ${ad936x_custom_refclk}; then
fdt set /clocks/clock@0 clock frequency ${ad936x_custom_refclk}; elif test n
${ad936x_ext_refclk}; then fdt set /clocks/clock@0 clock frequency ${ad936x_ext_refclk}; fi; fi; if
test n ${model}; then fdt set / model ${model}; fi; if test n ${ attr_name } && test n ${ attr_val };
then fdt set /amba/spi@e0006000/ad9361 phy@0 ${ attr_name } attr_val };
fw_setenvad936x_custom_refclk "<50000000>"
To check if the changes were successful, we can read the device-tree:
cat /proc/device-tree/clocks/clock@0/clock-frequency | xxd
the response was
# 00000000: 02FA F080 .}x@
02faf080 is 50000000 in hex, Success
Having got the Pluto to work with the external reference I spent some time adjusting levels. It was suggested on the internet that the pluto needed 0 to 10dbm to achieve lock but I found it needed much less than that, it would lock down to -22dbm input. I adjusted the output attenuator in the DFS50 to produce -10dBm output on mine
